Native GaN/GaOx Heterostructure Platform for Wafer-Scale Integration of High-Performance Complementary Transistors
Jinhua Liang, Chi Liu, Yuning Wei, Shun Feng, Yun Sun, Yutaka Ohno, Hui-Ming Cheng, Dong-Ming Sun · 2025
Read Native GaN/GaOx Heterostructure Platform for Wafer-Scale Integration of High-Performance Complementary Transistors by Jinhua Liang, Chi Liu, Yuning Wei, Shun Feng, Yun Sun, Yutaka Ohno, Hui-Ming Cheng, Dong-Ming Sun (2025) in the Tower of Babel, a free online library of public-domain works preserved in clean, searchable text. No sign-up. The full text is served as a plain-text file at a predictable URL, where text is present: https://antarctic-labs.com/tower-of-babel/pmc-12719557.txt.
Description
Jinhua Liang and co-authors build complementary transistors on a native nitride platform in a 2025 paper. Silicon scaling nears physical limits, pushing interest in new material pairs. Pairing thin semiconductors with wide-bandgap bases needs clean interfaces. Transfer and deposition tricks degrade uniformity and quality.
Their strategy oxidizes the nitride surface itself into a native dielectric layer. That in-place oxide avoids transfer damage entirely. A sheet semiconductor and carbon nanotubes formed the two transistor types. Interface trap density came out remarkably low. Switching steepness hit the thermal limit exactly. On-off ratios exceeded a hundred million at low voltage. Inverters reached a voltage gain above one hundred thirty. The platform suits standard chipmaking flows, the authors argue. Wafer-scale integration is the claimed advance. Energy-efficient complementary logic is the end goal.
Catalog record
| CREATOR | Jinhua Liang, Chi Liu, Yuning Wei, Shun Feng, Yun Sun, Yutaka Ohno, Hui-Ming Cheng, Dong-Ming Sun |
|---|---|
| YEAR | 2025 |
| COLLECTION | PAPERS |
| FORMAT | TXT |
| FILE SIZE | 23 KB |
| VERSION | 1.0 |
| LICENSE | CC BY 4.0 |
| RIGHTS | CC BY |
| SOURCE | Europe PMC |