Suppressing Gate-Induced Drain Leakage with an Asymmetric Gate Design in HiPco CNT FETs

Hui Ma, Senbiao Gu, Minglong Zhai, Honggang Liu · 2026

Read Suppressing Gate-Induced Drain Leakage with an Asymmetric Gate Design in HiPco CNT FETs by Hui Ma, Senbiao Gu, Minglong Zhai, Honggang Liu (2026) in the Tower of Babel, a free online library of public-domain works preserved in clean, searchable text. No sign-up. The full text is served as a plain-text file at a predictable URL, where text is present: https://antarctic-labs.com/tower-of-babel/pmc-13258365.txt.

Description

Hui Ma and colleagues redesign carbon nanotube transistors to slash off-state leakage in a 2026 simulation study. Narrow nanotube channels leak through band-to-band tunneling when switched off, wasting standby power. Pairing small-diameter tubes with an asymmetric gate reshaped the channel's electric landscape in calibrated device models.

The design reached extremely low off current while keeping on current high, setting a record switching ratio for its device class at the larger node. Scaled to a smaller node at lower voltage, the simulated device still held an excellent ratio with strong drive. Both polarities of operation were validated in simulation. Chip designers gain a credible route toward femtoampere standby in nanotube circuits. Fabrication proof must follow, since every figure here comes from modeling rather than measured hardware.

Catalog record

CREATORHui Ma, Senbiao Gu, Minglong Zhai, Honggang Liu
YEAR2026
COLLECTIONPAPERS
FORMATTXT
FILE SIZE16 KB
VERSION1.0
LICENSECC BY 4.0
RIGHTSCC BY
SOURCEEurope PMC

Source: https://europepmc.org/articles/PMC13258365

Browse the full library · About the Tower of Babel