Improving the Performance of Arsenene Nanoribbon Gate-All-Around Tunnel Field-Effect Transistors Using H Defects
Shun Song, Lu Qin, Zhi Wang, Juan Lyu, Jian Gong, Shenyuan Yang · 2024
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Description
Six researchers in China simulated a tiny transistor built from a one-atom-thick arsenic sheet, in a study published in 2024. The device is a tunnel transistor, prized for switching with very little power. Plain versions of the design performed poorly in their calculations. Adding a single hydrogen defect near one contact changed the picture sharply. The team used quantum-level simulation methods to track how electrons flow through the ribbon-shaped device.
With the defect placed well, on-currents jumped enough to meet industry targets for both fast and frugal chips at five-nanometer scale. The switching steepness also dropped below the classic sixty-millivolt limit. Wrapping the gate all around the channel improved things further, pushing steepness as low as thirty-five. The authors present defect placement plus gate design as a joint recipe for better two-dimensional transistors. Their guidance is theoretical, meant to steer future fabrication.
Catalog record
| CREATOR | Shun Song, Lu Qin, Zhi Wang, Juan Lyu, Jian Gong, Shenyuan Yang |
|---|---|
| YEAR | 2024 |
| COLLECTION | PAPERS |
| FORMAT | TXT |
| FILE SIZE | 23 KB |
| VERSION | 1.0 |
| LICENSE | CC BY 4.0 |
| RIGHTS | CC BY |
| SOURCE | Europe PMC |